Silicon processing

One way of reducing the cost is to develop cheaper methods of obtaining silicon that is sufficiently pure. Silicon is a very common element, but is normally bound in silica, or silica sand. Processing silica (SiO₂) to produce silicon is a very high energy process - at current efficiencies, it takes one to two years for a conventional solar cell to generate as much energy as was used to make the silicon it contains. More energy efficient methods of synthesis are not only beneficial to the solar industry, but also to
industries surrounding silicon technology as a whole.

The current industrial production of silicon is via the reaction between carbon (charcoal) and silica at a temperature around 1700 °C. In this process, known as carbothermic reduction, each tonne of silicon (metallurgical grade, about 98% pure) is produced with the emission of about 1.5 tonnes of carbon dioxide.
Solid silica can be directly converted (reduced) to pure silicon by electrolysis in a molten salt bath at a fairly mild temperature (800 to 900 °C).
While this new process is in principle the same as the FFC Cambridge Process which was first discovered in late 1996, the interesting laboratory finding is that such electrolytic silicon is in the form of porous silicon which turns readily into a fine powder, with a particle size of a few micrometres, and may therefore offer new opportunities for development of solar cell technologies.

Another approach is also to reduce the amount of silicon used and thus cost, is by micromachining wafers into very thin, virtually transparent layers that could be used as transparent architectural coverings.The technique involves taking a silicon wafer, typically 1 to 2 mm thick, and making a multitude of parallel, transverse slices across the wafer, creating a large number of slivers that have a thickness of 50 micrometres and a width equal to the thickness of the original wafer. These slices are rotated 90 degrees, so that the surfaces corresponding to the faces of the original wafer become the edges of the slivers.

The result is to convert, for example, a 150 mm diameter, 2 mm-thick wafer having an exposed silicon surface area of about 175 cm² per side into about 1000 slivers having dimensions of 100 mm × 2 mm × 0.1 mm, yielding a total exposed silicon surface area of about 2000 cm² per side. As a result of this rotation, the electrical doping and contacts that were on the face of the wafer are located at the edges of the sliver, rather than at the front and rear as in the case of conventional wafer cells. This has the interesting effect of making the cell sensitive from both the front and rear of the cell (a property known as bifaciality). Using this technique, one silicon wafer is enough to build a 140 watt panel, compared to about 60 wafers needed for conventional modules of same power output.